1. Field of the Invention
The present invention relates generally to modulation codes and methods. More specifically, run length limited (RLL) modulation codes together with a parity constraint enabling magnetic or optical recording systems to achieve higher data recording densities than with other modulation codes without sacrificing the reliability of playback data recovery are disclosed.
2. Description of Related Art
Modulation codes have been employed in magnetic and optical recording systems to limit recorded bit sequences to those that can be more reliably detected. In particular, RLL modulation codes have been employed with systems utilizing peak detection, partial response, maximum likelihood (PRML) detection, decision feedback equalization (DFE) channels, detection, and fixed delay tree search (FDTS) detection.
Partial response channels for magnetic data storage devices include a (1-D) dicode channel, a PR4 (1-D.sup.2) channel, an EPR4 (1+D-D.sup.2 -D.sup.3) channel, and more generally, a channel described by a polynomial of degree N: EQU p.sub.0 +p.sub.1 D+p.sub.2 D.sup.2 + . . . +p.sub.N D.sup.N
where the coefficients p.sub.0, p.sub.1, . . . , P.sub.N are real numbers. In each of these systems, a Viterbi detector is frequently utilized to achieve maximum likelihood detection of user data being played back from the recording medium.
A modulation code for a PRML data recording and playback channel is selected to balance efficiency and robustness against errors. The efficiency of a code is measured by a code rate k/n where k represents the number of user bits that are mapped into n recorded code bits by the encoder. Modulation codes with higher rates are deemed to be more efficient. Modulation codes which are more robust exclude more of the bit sequences that cannot be reliably detected. Thus, making the modulation code more robust results in a lower code rate. However, because detector performance can degrade with increasing channel densities, e.g., by approximately 6-9 dB per doubling of the channel density, higher code rates are desirable.
Rate 8/9 (d=0, G=4/I=4) modulation codes have been used. U.S. Pat. Nos. 4,707,681 and 5,260,703 describe examples of such rate 8/9 modulation codes. Rate 16/17 (d=0, G=6/I=7) modulation codes have also been used. U.S. Pat. No. 5,635,933 describes an example of such a rate 16/17 modulation code. In the (d, G/I) PRML code constraints for use in magnetic recording of digital data in disk memory devices, parameters d and G are global constraints which represent the minimum and maximum of zero run lengths, respectively, in the interleaved NRZI (INRZI) code bit sequence, where a run length of zeros may be regarded as a period of silence in the detection process.
The parameter I is the maximum interleave zero run length constraint and represents the maximum run length of zeros in the particular all-even or all-odd INRZI subsequences. Because a minimum run length of zeroes is inapposite in the context or PRML channel, the parameter d generally has a value of 0. A small value of G is desirable for accurate timing and gain recovery and control. In addition, a small value of I reduces the size of the path memory required in the maximum likelihood (ML) or Viterbi detector. These constraints must hold across codeword boundaries. Although described in terms of the (d, G/I) PRML code constraints for use in magnetic recording of digital data in disk memory devices, the code constraints and the apparatus for encoding and decoding data are applicable, however, to any PR signalizing system employing ML detection.
In recording systems using partial response signals such as PR4 or EPR4 and maximum likelihood, i.e., Viterbi algorithm, detection, it is critical that consecutive even and odd samples into the detector frequently have nonzero values. It is also critical to constrain consecutive samples input into a partial response detector so as to frequently include nonzero values. Such a constraint ensures that timing recovery and automatic gain loops have sufficient information to perform adequately.
In addition to the (0, G/I) run length constraints described above, it is desirable to have a parity constraint which forces each codeword to have even or odd parity. Significant coding gain results in digital recording systems when such a code is used in conjunction with the Viterbi algorithm operating on a trellis that is matched to the parity constraint, or in conjunction with a post-processor that can advantageously use the parity information to correct detected errors.
The parity code is an instance of a more general technique used in high density recording known as trellis coding. Trellis coding is a source coding technique used in a variety of contexts, from high-speed modems to MPEG decoding, to produce a sequence of bits from an incoming stream that conforms to certain desired characteristics. A trellis coder is a signal-space coder based on a finite state machine (FSM) and is so named because the FSM may be conveniently represented by its trellis.
What is needed is a system and method for generating higher rate modulation codes to in order to improve detector performance with increasing magnetic channel recording densities in magnetic data storage devices.